Ovonic Unified Memory

Abstract

Nowadays, digital memories are used in each and every fields of day-to-day life. Semiconductors form the fundamental building blocks of the modern electronic world providing the brains and the memory of products all around us from washing machines to super computers. But now we are entering an era of material limited scaling. 

Circuit Demonstration

In order to test the behavior of chalcogenide cells as circuit elements, the Chalcogenide Technology Characterization Vehicle (CTCV) was developed. The CTCV contains a variety of memory arrays with different architecture, circuit, and layout variations.  Key goals in the design of the CTCV were: 1) to make the read and write circuits robust with respect to potential variations in cell electrical characteristics; 2) to test the effect of the memory cell layout on performance; and 3) to maximize the amount of useful data obtained that could later be used for product design. The CTCV was sub-divided into four chiplets, each containing variations of 1T1R cell memory arrays and various standalone sub circuits.

Integration With CMOS

Under contract to the Space Vehicles Directorate of the Air Force Research Laboratory (AFRL), BAE SYSTEMS and Ovonyx began the current program in August of 2001 to integrate the chalcogenide-based memory element into a radiation-hardened CMOS process. The initial goal of this effort was to develop the processes necessary to connect the memory element to CMOS transistors and metal wiring, without degrading the operation of either the memory elements or the transistors. 

Introduction

 We are now living in a world driven by various electronic equipments. Semiconductors form the fundamental building blocks of the modern electronic world providing the brains and the memory of products all around us from washing machines to super computers. Semi conductors consist of array of transistors with each transistor being a simple switch between electrical 0 and 1.If scaling is to continue to and below the 65nm node, alternatives to CMOS designs will be needed to provide a path to device scaling beyond the end of the roadmap. However, these emerging research technologies will be faced with an uphill technology challenge. 

Conclusion

Unlike conventional flash memory Ovonic unified memory can be randomly addressed. OUM cell can be written 10 trillion times when compared with conventional flash memory. The computers using OUM would not be subjected to critical data loss when the system hangs up or when power is abruptly lost as are present day computers using DRAM a/o SRAM. OUM requires fewer steps in an IC manufacturing process resulting in reduced cycle times, fewer defects, and greater manufacturing flexibility. These properties essentially make OUM an ideal commercial memory.